pynq.lib.cma Module

class pynq.lib.cmac.CMAC(description)[source]

Bases: DefaultIP

Driver for the UltraScale+ Integrated 100 Gigabit Ethernet Subsystem.

bindto = ['xilinx.com:ip:cmac_usplus:3.1']

copyStats() → None[source]: Triggers a snapshot of CMAC Statistics Triggers a snapshot of all the Statistics counters into their readable register. The bit self-clears.

getStats(update_reg: bool = True) → dict[source]

Return a dictionary with the CMAC stats :param debug: :type debug: bool :param if enabled: :param the CMAC registers are copied from internal counters:

Return type:: A dictionary with the CMAC statistics

property internal_loopback: True if CMAC near-end PMA loopback is enabled.

reset(tx=0, rx=0, gt=1)[source]

Reset transmit path, receive path, or gigabit transceivers (full core).

Parameters:

tx (bool) – Reset transmit path.
rx (bool) – Reset receive path.
gt (bool) – Reset GTs.

start()[source]: Run core bring-up sequence.